Instructor

Jignesh Shah LinkedIn

"Our curriculum empowers students to acquire industry-relevant practical skills and methodologies essential for designing and implementing cutting-edge semiconductor chips, preparing them for immediate impact in the dynamic field of VLSI and semiconductors."

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JIGNESH SHAH, principal STA & CAD engineer at d-Matrix, is a passionate professional in the VLSI and the semiconductor field with over 25 years of experience spanning both small and large organizations. He previously worked as a senior principal physical design engineer with SiMa.ai and has held engineer positions at numerous Silicon Valley companies such as Intel, Cavium, Samsung, Oracle, and Sun Microsystems. He possesses deep expertise in sign-off methodology for design implementation across a diverse range of products, including SoCs, CPUs, ASICs, GPUs, and FPGAs. Shah earned his bachelor's degree from Gujarat University and a master's degree from the University of Southern California
in Electrical Engineering and is an engineering leader with strategic vision and hands-on technical expertise in computer programming and EDA tools and flows.

Associated Program(s)

Silicon Chip Design & Semiconductor Engineering

Introduction to VLSI and ASIC Design

Physical Design Flow From Netlist to GDSII

Timing Closure in Silicon IC Design