High-speed signaling technologies with multi-gigabit data transfer rates are critical to high-bandwidth communications. However, the physical limitations of the channel (in board, package, and connector), the transceiver circuits, as well as voltage and timing noises introduced along the signal paths, make the design of high-speed links very challenging. Accurate modeling and analysis of high-speed digital systems requires a good understanding of physical effects and system architecture in order to optimize the design parameters in the channel, transmitter, and receiver subsystems. This course in applied signal/power integrity gives students a set of skills for problem solving and strategies that bridge the gap between theory and real world applications by going through case studies from real designs.
This course starts with a comprehensive overview of signal and power integrity analysis for high-speed systems. The instructor promptly moves on to cover the state-of-the art modeling and analysis techniques used in high-speed links. The course introduces accurate interconnect modeling including high frequency and second-order effects, and behavioral modeling of IO and ESD, including IBIS. Students will learn the concepts of equalization design and various signaling techniques (such as differential, NRZ, pulse, multi-level, etc.). At the system level, topics include clocking schemes and timing jitter analysis, as well as power analysis topics such as IR Drop, AC noise, simultaneous switching noise, and decoupling capacitor. The course concludes with a discussion of variations in manufacturing and methods to handle them in simulation and design.
Upon completing the course, students will have a strong understanding of signal and power integrity concepts and terminology. They will acquire the skills to design, model, and analyze high-speed interconnects. They will be able to relate various link blocks and parameters to system performance and make trade off decisions.
Learning Outcomes
At the conclusion of the course, you should be able to
- Understand signal and power integrity concepts and terminology
- Perform design, modeling, and analysis of high-speed interconnects and systems
- Explain the impacts of inter-symbol interference, jitter, power supply noise on the performance of high speed systems
- Apply equalization, modulation, and advanced signaling techniques to increase system bandwidth
- Identify and relate various high-speed link components and parameters to system performance and make trade off decisions
Skills Needed:
Students must have a basic understanding of signal integrity, electromagnetic compatibility, printed circuit boards or packages.
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Prerequisite(s):
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Schedule
Date: | Start Time: | End Time: | Meeting Type: | Location: |
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Thu, 01-16-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 01-23-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 01-30-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 02-06-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 02-13-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 02-20-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 02-27-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 03-06-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 03-13-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |
Thu, 03-20-2025 | 6:30 p.m. | 9:30 p.m. | Live-Online | REMOTE |