This unique course provides an overview of all the steps in developing an ASIC, SoC, GPU or FPGA product. Key topics include transistor topology, standard cells, RTL synthesis, meeting timing, functional coverage, formal equivalence, physical design, signal integrity, DFT, chip tape-out, IC fabrication, and emerging packaging trends.

Through small hands-on labs and homework, students become familiar with the roles of architecture selection, micro architecture specification, synthesis, simulation, formal equivalence, and routing tools. The focus is on mostly-digital ASICs with multiple IP cores, low-power goals, and on-chip analog blocks.

Designed for professionals in the semiconductor field—whether experienced or entry-level—this course provides a deeper understanding of the product development process for silicon chips and SoCs. Knowledge gained in this course will improve cross-functional communication with other team members and prepare individuals for more rigorous study in the semiconductor design field.

Learning Outcomes
At the conclusion of the course, you should be able to

• Describe the overall design and verification flows of digital design.
• Discuss the latest design technology and methodology.
• Respond appropriately to challenging VLSI ASIC and FPGA interview questions.
• Describe the increasingly complex ASIC development flow.

Topics Include

• Overview of SoC (System on Chip) architectures
• Integration of IP cores
• Overcome the verification bottleneck
• How on-chip firmware code interacts with the chip’s hardware
• Digital logic gates, metal layers and vias, place & routing insights, noise avoidance, DFM issues, timing closure
• Business practices with silicon foundries: sort, shuttles, corner lots
• Comprehensive coverage of the chip design flow, from spec through tape-out to fabrication and packaging, equipping students for follow-on courses in RTL design, verification, DFT, and layout

Skills Needed:

• General understanding of digital logic.
• Lab exercises require some knowledge of Linux.