PCI Express has become the dominant intrasystem IO interconnect from the largest servers to mobile phones and embedded devices. In this course for developers and support engineers in hardware, firmware, software, and field-application, students will gain a stronger understanding of the protocol.

We will start with an introduction to IO concepts which will give us an understanding of why IO protocols behave the way they do. We will then dive into PCI Express including the recently-released 6.0 version. PCI Express enables interfacing with Ethernet and other protocols to achieve intersystem communication. We will end with an overview of Ethernet and how PCI Express and Ethernet work together to enable communication.

Through lectures, homework assignments, and a final exam, students will gain a broad idea of how IO works in a modern computer system and be better prepared to work with device drivers and troubleshoot IO problems. Note: The course does not cover chip or board design aspects of IO.

Learning Outcomes
At the conclusion of the course, you should be able to

• Describe how IO works in a modern computer system.
• Understand how a device driver communicates with the hardware it controls.
• Explain protocol specifics of PCI Express and Ethernet.

Topics Include

• Modern computer architecture in block diagram format
• Flow of an IO request
• IO concepts: MMIO, DMA, interrupts
• Address spaces: configuration, memory, IO
• Device discovery
• Introduction to PCI Express, evolution from PCI, PCI-X
• How MMIO, DMA, interrupts, and discovery work in PCI Express
• Changes introduced in PCI Express 6.0
• Introduction to Ethernet: CSMA/CD, frame format, VLANs, aggregation
• Additional areas to explore to increase IO knowledge and skills

Skills Needed:

An introductory course or practical experience with operating systems internals, an introduction to computer architecture and organization, and systems programming experience.