Semiconductor Design and Innovation Workshop Series: RISC-V fpga: Understanding Computer Architecture | VLSI.800_W2

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Welcome to our immersive Semiconductor Design and Innovation workshop series. During these sessions you will be introduced to new and established tools that will help you create and manipulate content in new and powerful ways. Each session is led by an industry expert who will guide you through the material and share its real-world implications.

Learning Outcomes

At the conclusion of the workshop, you should be able to

• Describe and discuss the architecture of RISC-V processors, their fundamental components, and how they compare to other instruction set architectures in modern computing systems.
• Identify critical hardware and software components within a RISC-V system-on-chip design, including memory interfaces, peripherals, and the toolchain required for development.
• Demonstrate an ability to properly and effectively design, implement, and debug custom RISC-V-based systems on FPGA hardware using industry-standard development tools and methodologies.

Topics Include

• Installing tools (which can be done before the workshop)
• Targeting the SweRV EH1 RISC-V core to an FPGA
• Architecture and Components
• Analyzing and modifying the RISC-V-core and memory hierarchy

As an open-source, extensible ISA, RISC-V is shaping the future of computing. The RVfpga Workshop introduces a commercial RISC-V system on FPGA, covering theory, architecture, and hands-on labs from the full RVfpga course. Participants will work with Western Digital’s open-source SweRV EH1 core on a Xilinx Artix 7 FPGA (Digilent Nexys A7), gaining practical experience with both hardware and software tools to seamlessly integrate RISC-V into their curriculum.

Students are required to bring laptops for class exercises