Method
Live-Online
Term
FALL
WINTER
Units
3.0 QUARTER UNITS
Cost
$990

Skills you will gain

  • Identify and resolve pipeline hazards and explain out-of-order execution.
  • Evaluate tradeoffs between various cache organization and replacement policies.
  • Understand virtual memory organization.
  • Design protocol meeting memory coherence and consistency requirements.
  • Explain data level parallelism.

Course Description


Computer architecture focuses on techniques to design high-performance processors and is a prerequisite for both design and verification engineers, in any modern processor design project. This course covers computer architecture essentials, as well as some advanced topics, such as multi-threading, data level parallelism in GPUs and multi-core processors. Through a lecture-based approach, supplemented with practical problem sets, you'll navigate the intricacies of Verilog coding, timing graph walkthrough, and micro-architecture solutions. This course is intended for design and verification engineers interested in working on processor or complex digital system design projects.

 

 

Topics

  • Processor design
  • Multi-core processors
  • Data level parallelism in GPUs
  • Memory systems and hierarchy
  • Vectorization
  • Multi-threading

 

Additional Information

AI* - This course introduces architectures for AI workloads including GPUs and AI accelerators. It also touches upon programming models for these architectures. 

Prerequisites / Skills Needed

Prerequisites:

  • VLSI.X404: Digital Logic Design Using Verilog

Skills Needed:

  • Knowledge of digital system design with Verilog/SystemVerilog is required.
Syllabus Library
You may enroll in this offering at any time.
Satheesh Pillai
Oct. 6 - Dec. 15, Tue, 6:30pm - 9:30pm
  • Live-Online Attend via Zoom at scheduled times.
VLSI.X415.(6)
Schedule
Date Start Time End Time Meeting Type Location
Tue, 10-06-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 10-13-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 10-20-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 10-27-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 11-03-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 11-10-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 11-17-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 12-01-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 12-08-2026 6:30pm 9:30pm Live-Online REMOTE
Tue, 12-15-2026 6:30pm 9:30pm Live-Online REMOTE
 

This class is offered in an online synchronous format. Students are expected to log into this course via Canvas at the start time of scheduled meetings and participate via Zoom, for the duration of each scheduled class meeting.

No meeting on November 24, 2026.  To see all meeting dates, click "Full Schedule" below.

You will be granted access in Canvas to your course site and course materials approximately 24 hours prior to the published start date of the course.

 

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Prerequisites / Skills Needed

Prerequisites:

  • VLSI.X404: Digital Logic Design Using Verilog

Skills Needed:

  • Knowledge of digital system design with Verilog/SystemVerilog is required.
You may enroll in this offering at any time.
Samit Mehrotra
Samit Mehrotra
Jan. 13 - Apr. 1, Wed, 6:30pm - 6:30pm
  • Live-Online Attend via Zoom at scheduled times.
VLSI.X415.(7)
Schedule
Date Start Time End Time Meeting Type Location
Wed, 01-13-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 01-20-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 01-27-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 02-03-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 02-10-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 03-03-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 03-10-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 03-17-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 03-24-2027 6:30pm 9:30pm Live-Online REMOTE
Wed, 03-31-2027 6:30pm 6:30pm Live-Online REMOTE
 

This class is offered in an online synchronous format. Students are expected to log into this course via Canvas at the start time of scheduled meetings and participate via Zoom, for the duration of each scheduled class meeting.

No meeting on February 17, 2027 and February 24, 2027.  To see all meeting dates, click "Full Schedule" below.

You will be granted access in Canvas to your course site and course materials approximately 24 hours prior to the published start date of the course.  
 

Access to a Windows, Mac, or Linux computer and the ability to install software is required.

Required Textbook:  
Computer Architecture: A Quantitative Approach, 6th ed. by John L. Hennessy, David A. Patterson, 2017. ISBN-13: 978-0128119051

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Prerequisites / Skills Needed

Prerequisites:

  • VLSI.X404: Digital Logic Design Using Verilog

Skills Needed:

  • Knowledge of digital system design with Verilog/SystemVerilog is required.

This course applies to these programs:

Demo