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Comment Showing 22 courses.

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Practical Design with Xilinx FPGAs

EMBD.X408
Winter TBD
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
06-16-2025 to 08-18-2025
$910
Joanna Mapel
Santa Clara / Remote
EMBD.X408.(15)
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See complete class schedule here.

Comprehensive Signal and Power Integrity for High-Speed Digital Systems

EMBD.X400
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
06-27-2025 to 09-05-2025
$980
Kalyan Rapolu
Remote
EMBD.X400.(15)
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Physical Design Flow From Netlist to GDSII

VLSI.X408
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
06-13-2025 to 09-05-2025
$980
Shree Laguduva
Santa Clara / Remote
VLSI.X408.(14)
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See complete class schedule here.

System and Functional Verification Using UVM (Universal Verification Methodology)

VLSI.X410
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
06-17-2025 to 09-02-2025
$980
Benjamin Ting
Remote
VLSI.X410.(32)
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Advanced Verification with SystemVerilog OOP Testbench

VLSI.X400
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
06-26-2025 to 09-11-2025
$980
Benjamin Ting
Remote
VLSI.X400.(24)
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09-17-2025 to 11-19-2025
$980
Andres Mancera
Santa Clara / Remote
VLSI.X400.(25)
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See complete class schedule here.

Wireless Infrastructure: from Antenna Design to 5G, Fundamentals

EMBD.X419
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
06-26-2025 to 08-28-2025
$775
Edison Fong
Santa Clara / Remote
EMBD.X419.(11)
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See complete class schedule here.

High-Performance Computer Architecture

VLSI.X415
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
07-12-2025 to 09-13-2025
$980
Samit Mehrotra
Santa Clara / Remote
VLSI.X415.(4)
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See complete class schedule here.

AI for Autonomous Driving Systems: Concepts to FPGA

VLSI.X416
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
07-03-2025 to 09-03-2025
$980
Parag Bhatt
Remote
VLSI.X416.(4)
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Semiconductor Design and Innovation Workshop Series: RISC-V: Understanding Computer Architecture

Bullhorn New
VLSI.800_W2
CEU: 0.5 CEUs
Start / End Date
Cost
Instructor
Location
Section ID
06-07-2025 to 06-07-2025
$145
Abhay Singh
Santa Clara / Remote
VLSI.800_W2.(1)
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See complete class schedule here.

SystemVerilog Assertions and Formal Verification

VLSI.X411
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
06-16-2025 to 08-18-2025
$980
Emiliano Morini
Remote
VLSI.X411.(16)
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Embedded System Hardware Architectures, Introduction

EMBD.X415
Quarter Units: 3.0

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IO Concepts and Protocols: PCI Express and Ethernet

EMBD.X406
Quarter Units: 3.0

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Digital Logic Design Using Verilog

VLSI.X404
Quarter Units: 3.0

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Introduction to VLSI and ASIC Design

VLSI.X403
Quarter Units: 3.0

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Timing Closure in Silicon IC Design

VLSI.X414
Quarter Units: 3.0

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Analog IC Design, Introduction

VLSI.X401
Quarter Units: 3.0

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3D IC Packaging and Physical Verification

VLSI.X418
Quarter Units: 3.0

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Practical DFT Concepts for ASICs, SoC and SiP

VLSI.X409
Quarter Units: 3.0

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High Speed Interface Techniques

VLSI.X405
Quarter Units: 3.0

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Semiconductor Design and Innovation Workshop Series: Timing Constraint Management for Modern System On Chip

VLSI.800_W1
CEU: 0.3 CEUs

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ASIC Physical Design, Advanced

VLSI.X402
Quarter Units: 3.0

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Practical Design and Implementation of VLSI Memory Devices

VLSI.X417
Quarter Units: 3.0

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