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VLSI Engineering
Certificate Program

VLSI Engineering

Building the hardware of tomorrow

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Certificate Description

Learn next-level VLSI design skills for top Silicon Valley companies

UCSC Silicon Valley Extension VLSI (very large scale integration) Engineering professional certificate program provides students with the core design skills they need to work at top companies in the Valley. Both established and aspiring engineers develop new skills, gain insight into digital and analog design techniques and methodologies, and learn from our expert faculty.

Integrated circuit curriculum

In the UCSC Silicon Valley VLSI certificate program, you'll explore ASIC, semiconductor, EDA, device, and integrated circuits. In our VLSI lab, our expert instructors will give you the opportunity to get hands-on experience with hardware specification, logic design, verification, synthesis, physical implementation, circuit design, integrated circuit product testing, and the latest EDA tools on Linux.

Who are our students?

Logic designers, design for test professionals, verification engineers, and project leaders receive next-level training for career growth so they can meet the latest demands of top Silicon Valley employers.

Two tailored elective tracks

  • Track 1: Front-end Design
    For professionals pursuing careers in application-specific integrated circuits (ASIC) architectural definitions and logic designs for its implementation.
  • Track 2: Back-end Design
    For professionals interested in the physical implementations of ASIC designs from synthesis to silicon.

In our VLSI lab, you’ll explore ASIC, semiconductor, EDA, device, and integrated circuits with expert instructors. You’ll get hands-on experience with hardware specification, logic design, verification, synthesis, physical implementation, circuit design, integrated circuit product testing, and the latest EDA tools on Linux.

Access to premier tools

Using premier industry tools from Synopsys and Cadence, you’ll learn front-end and back-end ASIC design and leave the classroom ready to apply new skills at your job.

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VLSI Engineering certificate program objectives

  • Implement Verilog modeling of digital logic
  • Write assertions for formal verification using SystemVerilog
  • Build an advanced UVM verification environment
  • Understand and implement DFT concepts in an ASIC design
  • Complete practical designs with Xilinx FPGAs
  • Implement a design from RTL to GDS

Program Overview

Estimated Cost: Track 1 starts at $4,350. | Track 2 starts at $4,620. (You pay only for courses you enroll in.) | International Tuition Cost
Program Requirements: 5 courses (minimum 14 quarter units). Take 3 required courses (9 quarter units) and 2 elective courses (minimum 6 quarter units). End with certificate of completion review.
Minimum Hours of Instruction: Minimum 150 hours of instruction.
Estimated Duration: A full-time student can complete the certificate in 9–12 months.

Courses


1. Core Course(s): (Choose Three)

Fall TBD
Quarter Units: 3.0
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Quarter Units: 3.0
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Location
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01-12-2023 to 03-16-2023
$980.00
VLSI.X400.(18)
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Spring TBD
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
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Quarter Units: 3.0
Start / End Date
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Instructor
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01-09-2023 to 03-27-2023
$980.00
VLSI.X409.(9)
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Quarter Units: 3.0
Start / End Date
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Instructor
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01-17-2023 to 03-21-2023
$980.00
VLSI.X410.(22)
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Quarter Units: 3.0
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Instructor
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01-18-2023 to 03-22-2023
$980.00
VLSI.X411.(11)
See complete class schedule here.
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2. Electives: Front-End

Quarter Units: 3.0
Start / End Date
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01-24-2023 to 03-28-2023
$880.00
VLSI.X401.(11)
See complete class schedule here.
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-23-2023 to 04-03-2023
$980.00
EMBD.X401.(11)
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-26-2023 to 03-30-2023
$820.00
VLSI.X405.(12)
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
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3. Electives: Back-End

Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-19-2023 to 03-23-2023
$980.00
EMBD.X400.(10)
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-26-2023 to 03-30-2023
$820.00
VLSI.X405.(12)
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-20-2023 to 03-24-2023
$980.00
VLSI.X408.(9)
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

02-18-2023 to 04-22-2023
$980.00
VLSI.X417.(2)
See complete class schedule here.
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-11-2023 to 03-15-2023
$910.00
EMBD.X408.(10)
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Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
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4. Completion Review:

Start / End Date
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Meet Our Instructors

Ajit A Natarajan
Sr. Software Engineer, Google
Arvind Vidyarthi
Sr. Dtr., Silicon Design Implementation/Methodology, Intel | Board Chair
Benjamin Ting
Principal Engineer, Micron Technology
Edison Fong
RF Engineer and Analog Engineer, Consultant
Jagadeesh Vasudevamurthy
Software Engineer, Xilinx (AMD)
Jignesh Shah
Senior Principal Physical Design Engineer, SIMA.ai
Mandar M Munishwar
Formal Verification Engineer, Google
Mehrdad Peyvan
Senior Hardware Test Engineer Manager, Analog Devices
Michael A. Wang
Director of Business Development, ISSI Integrated Silicon Solution Inc.
Rajesh Y Pendurkar
Director of Engineering, Capgemini
Sam D Huynh
Principal Member of Technical Staff, AMD
Shahrokh Shakouri
ASIC Backend Consultant Specialist, Bay Area Chip Design
Sudha Thiruvengadam Vasu
Top Lead for Custom Memory Test Chip Design, Meta

Certificate Inquiry Form

Contact Us
Speak to a student services representative.

Call (408) 861-3860

Envelope extension@ucsc.edu

Requisite Knowledge

Technical expertise

You need a degree in a technical field or equivalent knowledge acquired through training and experience in hardware design and development. Experience with UNIX and/or LINUX is required for lab sessions. Knowledge of a programming language such as C, Perl or Bash Shell is helpful.

Please review course descriptions

Make sure you have taken necessary prerequisites or meet the requirements through job experience or previous education before registering for a course.

Advisory Board

Arvind Vidyarthi, instructor

Certificate Program Chair

ARVIND VIDYARTHI, M.S.E.E., senior director of silicon design implementation and methodology at Intel, has 17+ years of industry experience in chip implementation in various major semiconductor companies such as Sun Microsystems, AMD, and Nvidia. He has successfully managed chip design tapeouts at Intel and is familiar with all major implementation tools and methodologies. He is passionate about ML/AI in physical design and timing closure for performance, power, and area (PPA) and turn-around-time improvement. He is an instructor and chair of the UCSC Silicon Valley Extension VLSI Engineering certificate program since 2022.

Certificate Program Advisory Committee

JEFFERY GOODING, MSEE
Account Technology Executive, Cadence Design Systems

SAM HUYNH, Ph.D., MSEE
Principal Member of Technical Staff, AMD
Instructor, VLSI Certificate Program, UCSC Silicon Valley Extension

VIDHYADHARAN JAYAPAL
Senior Manager, Applications Engineering, Synopsys Inc.

MANDAR MUNISHWAR, B.E.
Formal Verification Engineer, Google
Instructor, VLSI Certificate Program, UCSC Silicon Valley Extension

JOSE RENAU, Ph.D.
Professor, Computer Science and Engineering, Jack Baskin School of Engineering, UC Santa Cruz
Consultant, Esperanto Technologies, Inc.

BENJAMIN TING, M.S.E.E.
Principal Engineer, Micron Technology
Chair/Instructor, VLSI Certificate Program, UCSC Silicon Valley Extension

ARVIND VIDYARTHI, M.S.E.E.
Senior Director of Silicon Design Implementation/Methodology, Intel Corp.

Establish Candidacy

Establish candidacy in a certificate or specialization

Once you create your student account, you can establish candidacy in a certificate or specialization program any time during your studies.

The benefits of enrolling early
  • Lock in your certificate requirements.This means that even if program requirements change, the requirements to complete your certificate will remain the same for you
  • Receive program updates
  • Set your intention
  • It’s free

To complete a program, you must enroll in the certificate program before enrolling in the Certificate Completion Review.

You have five years to complete all necessary courses in a certificate program or three years to finish up a specialization program.

All the necessary units in a certificate must be completed within this window.* The clock begins on the first day of your first course in the certificate program. For example, if you started a course on Sept. 5, 2017, you would have to complete all of the required units in this certificate by Sept. 4, 2022.

Note:

Enrolling in a certificate program does not trigger the beginning of the five-year window. It begins the first day of the first course that applies to a certificate program. The Certificate Completion Review process does not have to occur within the five-year timeframe.

For more information: How do I get my certificate or specialization?

* Students participating in a special program, such as workforce, international, Personal Financial Planning, or curriculum partner programs (such as GreenFig or CLS by Barbri) may have a shorter completion requirement.

Establish Candidacy

Grade Requirements

Please note that only letter grades of C or higher may be applied to a certificate, and in some programs, students may have more stringent requirements. Students in most employer- and government-sponsored payment programs, such as workforce development, as well as international students on F-1 visas, need to maintain a B average to meet their requirements. Personal Financial Planning students have additional grade requirements for individual courses to attain a certificate.

See Grading and Credits Policy for further information.